A.1 Instruction Set Reference

Here, we summarize the RV32I instructions of the RISC-V ISA and OS calls that are most important for this book. The official RISC-V reference [17] provides further details on the RV32I instruction set.

Unless stated otherwise, each instruction increments the program counter by 4.
We use to denote a sign extension of a bit string to 32 bit and for a zero extension of a bit string to 32 bit (see Section 1.4.0.1).
Note that instructions using an immediate perform either sign or zero extension of the 16-bit immediate to 32 bit depending on the opcode.
und denote signed and unsigned comparisons.
, und denote memory contents at address in form of a word, half word or byte.
We use the following abbreviation to compute the new address for a conditional jump:

A.1.1 Arithmetic

Mnem	Args	Semantics	Comment
`add`			Add two registers
`addi`			Add register with immediate
`sub`			Subtract two registers
`mul`			Multiply two registers
`div`			Divide two registers
`rem`			Remainder of division
`neg`

A.1.2 Bitwise Logic

Mnem	Args	Semantics	Comment
`and`			Bitwise and
`andi`			Bitwise and with immediate
`or`			Bitwise or
`ori`			Bitwise or with immediate
`xor`			Bitwise xor
`xori`			Bitwise xor with immediate
`not`			Bitwise complement
`sll`			Shift left by
`slli`			Shift left by
`srl`			Unsigned shift right by
`srli`			Unsigned shift right by
`sra`			Signed shift right by
`srai`			Signed shift right by

A.1.3 Loads and Stores

Mnem	Args	Semantics	Comment
`li`			Load immediate / constant
`lui`			Load upper immediate
`auipc`			Add upper immediate to pc
`la`			Load address of symbol
`lw`			Load word
`lh`			Load half word with sign extension
`lhu`			Load half word with zero extension
`lb`			Load byte with sign extension
`lbu`			Load byte with zero extension
`sw`			Store word
`sh`			Store half word
`sb`			Store byte

A.1.4 Comparisons

Mnem	Args	Semantics	Comment
`slt`			Set less than
`slti`			Set less than immediate
`sltu`			Set less than unsigned
`sltiu`			Set less than immediate unsigned

A.1.5 Branches

Mnem	Args	Semantics	Comment
`beq`			Branch if equal
`bne`			Branch if not equal
`blt`			Branch if less (signed)
`bltu`			Branch if less (unsigned)
`bge`			Branch if greater or equal (signed)
`bgeu`			Branch if greater or equal (unsigned)
`bgt`			Branch if greater (signed)
`bgtu`			Branch if greater (unsigned)
`ble`			Branch if less or equal (signed)
`bleu`			Branch if less or equal (unsigned)
`beqz`			Branch if equal to zero
`bnez`			Branch if not equal to zero
`bltz`			Branch if less than zero
`bgez`			Branch if greater or equal to zero
`bgtz`			Branch if greater than zero
`blez`			Branch if less or equal to zero

A.1.6 Jumps and Function Calls

Mnem	Args	Semantics	Comment
`jal`			Jump and link
`jalr`			Jump and link indirect
`j`			Unconditional jump
`jr`			Indirect jump
`call`			Call subroutine
`ret`			Return from subroutine

A.1.7 Miscellaneous

Mnem	Args	Semantics	Comment
`ecall`			Invoke operating system
`nop`			No operation / no-op
`mv`			Copy register